Address
304 North Cardinal St.
Dorchester Center, MA 02124
Work Hours
Monday to Friday: 7AM - 7PM
Weekend: 10AM - 5PM
At the beginning of 2025, PCIe 7.0 is getting closer
As a widely adopted high-speed serial point-to-point interconnection standard in the industry, PCIe has undergone many iterations and upgrades since its inception, and has now become an indispensable interconnection bridge between computing devices such as CPUs, GPUs, FPGAs, and SSDs. The PCIe 7.0 standard boosts data transfer rates to an astonishing 32 GB/s per lane.
Extended reading:
◦ Panoramic Interpretation of PCIe P2P DMA
At the US DevCon in June 2022, the PCI-SIG announced continued progress on the PCI Express 7.0 specification. Version 0.3 will be released in June 2023 and version 0.5 will be released in April 2024. The latest development, PCIe 7.0 ver0.7 has been released, and unsurprisingly, the official version of the SPEC specification will also be released in 2025.
While the final version of the PCIe 7.0 specification is expected to be available in 2025, it may take longer for the actual product to become widely available due to various hurdles encountered in development, testing, and manufacturing.
Key feature objectives for PCIe 7.0
1.Double the bandwidth:
◦ PCIe 7.0 is designed to double the transfer rate of PCIe 6.0 (64 GT/s) to the native bit rate of 128 GT/s and deliver up to 512 GB/s bidirectional transfer speeds in x16 configurations. This represents a major leap forward in data throughput and is critical for applications that need to process large amounts of data.
2.With PAM4 signaling technology:
◦ Continue to use and optimize the Pulse Amplitude Modulation with 4 levels (PAM4) signaling technology introduced since PCIe 6.0, which allows two data bits to be encoded per clock cycle, effectively improving data transmission efficiency. (Analysis of PCIe 6.0 feature updates and implementation challenges).
3.Focus on channel parameters and accessibility:
◦ Designing for channel performance at the physical layer to ensure signal integrity over longer distances is especially important for interconnects within the data center.
4.Consistently low latency and high reliability:
◦ Ensuring that data transmission is not only fast, but also extremely low latency and reliability is important for real-time applications such as artificial intelligence/machine learning (AI/ML) and cloud computing.
5.Improving energy efficiency:
◦ As equipment performance increases, energy efficiency issues become increasingly critical. PCIe 7.0 is committed to reducing energy consumption and making data centers and other high-performance computing environments more environmentally friendly and economical.
6.Maintain backward compatibility:
◦ Despite the introduction of many new technologies, PCIe 7.0 still supports all previous versions of PCIe technology, which means that existing hardware investments can be protected while also allowing for a smooth transition to next-generation standards.
As accelerated computing becomes mainstream, the role of PCIe connectivity in the system becomes even more important. Direct GPU-to-GPU communication is essential for scaling complex computing tasks across multiple graphics processing units (GPUs) or servers, accelerators in the computing cabin. There is a growing awareness within the industry of the growing need for scalable, open architectures in the field of high-performance computing. As AI and data-intensive applications continue to grow, the demand for these technologies is expected to increase, making PCIe 7.0 a key component of next-generation interface IP.
In applications such as AI training, large-scale data analysis, and real-time rendering, data transmission speed and efficiency are the key factors that determine system performance. PCIe 7.0 provides double the bandwidth of 128 GT/s compared to the previous generation, which not only means faster data flow between GPUs, but also supports more efficient resource allocation and workload balancing. For example, in large-scale machine learning model training scenarios, multiple GPUs are directly connected through PCIe 7.0, which can greatly shorten the training time and improve the model iteration speed, thereby accelerating the development and deployment of new algorithms and services.
In addition, as data center architectures evolve to be more distributed and flexible, the high bandwidth and low latency features of PCIe 7.0 are critical to support remote direct memory access (RDMA) and high-speed data transfers. This allows data to move between different compute nodes in near real-time, making it possible to build an efficient and responsive data center infrastructure.
PCIe 7.0 is not only a simple increase in data transfer speed, but also a key technology to promote the development of high-performance computing architectures in a more flexible and scalable direction. With the continuous maturity of technology and the deepening of applications, PCIe 7.0 is expected to become the cornerstone of a new era of accelerated computing, supporting the development and innovation of AI, big data, cloud computing and other fields.
While the PCIe protocol optimizes latency performance, latency accumulation can accumulate within large-scale data centers due to longer distances and increased interconnection layers. As data rates increase, interconnect power consumption issues become increasingly prominent, posing challenges to overall energy efficiency and thermal designs.
With the continuous surge of data and the explosive growth of compute-intensive applications, traditional electronic interconnect technologies have increasingly shown their limitations when dealing with multi-dimensional requirements such as high bandwidth, low latency, and energy saving. In this context, optical interconnection technology has gradually become the focus of attention in the industry due to its unique performance advantages, and is regarded as the key to breaking the game of future data center interconnection technology.
In such an environment, the demand for high-speed data transfer within and between data centers has increased dramatically. AI applications, such as deep learning and machine learning, need to process massive amounts of data and have extremely high requirements for real-time performance and bandwidth. The PCIe (Peripheral Component Interconnect Express) bus of traditional copper media has physical limitations in terms of transmission distance, bandwidth expansion, and signal integrity, which is difficult to meet the requirements of long-distance and high-bandwidth data transmission between large-scale data centers.
As a result, the industry has begun to explore the application of the PCIe protocol to optical links, the so-called PCIe over Optics technology. This technology converts PCIe signals into optical signals for transmission, and breaks through the distance and speed bottlenecks of traditional copper interfaces by taking advantage of the large capacity, low loss, and long-distance transmission characteristics of optical fibers.
